Partially Adaptive Cluster Based Routing for Network-on-Chip

  • Vrishali Vijay Nimbalkar University of Pune
  • Jalpa Shah
  • Girish G Bhide
  • Giri S Kulkarni
  • Gauri Khedkar
Keywords: Cluster, routing, NoC

Abstract

As the technology is scaling, reducing wire delays is the major hurdle in increasing communication speed between the cores of System-on-Chip (SoC). Also in today’s technology 50% of silicon area is occupied by interconnects. Efficient use of interconnects is possible due to highly scalable and reliable Network-on-Chip (NoC) communication architecture which has replaced long buses by routers. Routers in NoC make use of intelligent routing algorithms to route the information reliably between the cores irrespective of the topology used. With the help of routing algorithms router optimizes the use of interconnects. Algorithms should provide deadlock free and congestion free routing while ensuring the reachability to destination. This paper presents partially adaptive Cluster based routing referred to as Cluster based routing for regular mesh topology which, (i) Uses cluster approach to reduce the size of routing table. For a 8x8 Mesh there is 76.57% area reduction in routing table. (ii) Provides deadlock free partially adaptive algorithm without use of virtual channels which is achieved by avoiding cyclic paths. (iii) Uses adaptivity to avoid congestion by uniform distribution of traffic between cores.

References

[1] David Atienza, Federico Angiolini, Srinivasan Murali, Antonio Pullini, Luca Benini, Giovanni De Micheli, Network-on Chip Design and Synthesis Outlook, Elsevier Science, November 2007. [2] Rickard Holsmark, Maurizio Palesi, Shashi Kumar,Deadlock free routing algorithm for irregular mesh topology NoC systems with \ rectangular regions, Journal of Systems Architecture 54(2008) 427-440. [3] Jingcao Hu and Radu Marculescu,DyAD - Smart Routing for Netwoks-on-Chip, CSSI Technical Report,USA. [4] R.Narasimhan, Ujjwal Kumar, B.Ravindran, Vijay Laxmi, M.S.Gaur, and B.M.Al Hashimi,Application of Q-Routing Algorithm in Networks on Chip. [5] Jose Duato, A New Theory of Deadlock-Free Adaptive Routing in Wormwhole Networks, IEEE Transactions on Parallel and Distributed Systems, vol 4, No.12 December 1993. [6] Christopher J.Glass and Lionel M.Ni,The Turn Model for Adaptive Routing, Association for Computing Machinery, 1992. [7] Alien Vieira de Mello, Luciano Copello Ost, Fernando Gehm Moraes,Ney Laert Vilar Calazans,Evaluation of Routing Algorithms on Mesh Based NoCs, Technical Report Series No.040, May,2004. [8] Zhaohui Song, Guangsheng Ma, Dalei Song,A NoC-Based High Performance Deadlock Avoidance Routing Algorithm. [9] Everton Alceu Carara, Fernando Gehm Moraes,Deadlock-Free Multicast Routing Algorithm for Wormhole-Switched Mesh Networks-on-Chip, IEEE Computer Society Annual Symposium on VLSI, 2008. [10] Ge-Ming Chiu,The Odd-Even Turn Model for Adaptive Routing, IEEE Transactions on Parallel and Distributed Systems, vol 11, No 7, July 2000.
Published
2018-03-21
How to Cite
Nimbalkar, V., Shah, J., Bhide, G., Kulkarni, G., & Khedkar, G. (2018). Partially Adaptive Cluster Based Routing for Network-on-Chip. Asian Journal For Convergence In Technology (AJCT) ISSN -2350-1146, 2(2). Retrieved from http://www.asianssr.org/index.php/ajct/article/view/185
Section
Article

Most read articles by the same author(s)

Obs.: This plugin requires at least one statistics/report plugin to be enabled. If your statistics plugins provide more than one metric then please also select a main metric on the admin's site settings page and/or on the journal manager's settings pages.